1. Field Of The Invention
This invention relates to flash electrically-erasable programmable read-only memories (flash EEPROM) and, more particularly, to methods for retaining data necessary to the management of a block of flash EEPROM during the erasure of that block.
2. History Of The Prior Art
Modern computer systems make extensive use of long term memory. Typically this memory is provided by one or more electro-mechanical hard (fixed) disk drives constructed of flat circular magnetic disks which rotate about a central axis and which have a mechanical arm to write to or to read from positions on the magnetic disk. Hard disk drives are very useful and have become almost a necessity to the operation of personal computers. However, such electro-mechanical drives are relatively heavy, require a significant amount of space within a computer, require a significant amount of the power in use, and are very susceptible to shock. A had drive within a portable computer which is dropped is quite likely to cease functioning with a catastrophic loss of data.
Recently, forms of long term storage other than electro-mechanical hard disk drives have become feasible for use in computers. One of these is flash EEPROM. A flash EEPROM memory array includes a large plurality of floating-gate field effect transistors arranged as memory cells in typical row and column fashion with circuitry for accessing the individual cells and placing the memory transistors of those cells in one of two memory conditions. A flash EEPROM memory cell, like a typical EPROM cell retains information when power is removed. Unlike a typical EPROM cell, however, a flash EEPROM cell may be erased electrically in place within a system.
Flash EEPROM memory has a number of characteristics which adapt it to use as long term memory. It is light in weight, occupies very little space, and consumes less power than electro-mechanical disk drives. More importantly, it is especially rugged. It will withstand, without adverse effects, repeated drops each of which would destroy a typical electro-mechanical hard disk drive.
A difficulty with flash EEPROM, however, is that it must be erased before it can be reprogrammed and it is very slow to erase. Flash EEPROM is erased by applying a high voltage simultaneously to the source terminals of all of the transistors (cells) used in the memory. Because these source terminals are all connected to one another by metallic busing in the array, the entire array must be erased at once. While an electromechanical hard disk will typically store information in a first area of the disk and then rewrite that same area of the disk when the information changes by changing the magnetic field stored in the area, this is not possible with a flash memory array without erasing all of the valid information that remains in the array along with the invalid (dirty) information.
Because of this, a different arrangement is used for erasing dirty sectors of a flash EEPROM array. One such arrangement is disclosed in detail in U.S. patent application Ser. No. 07/969,131, entitled Method and Circuitry for A Solid State Memory Disk, S. Wells, filed on Oct. 30, 1992, and assigned to the assignee of the present invention. In that arrangement, the entire array is divided into smaller separately erasable blocks so that when a block is erased the amount of valid data which must be reprogrammed is reduced. Typically, the array is composed of a number of silicon chips; and each such chip includes a number of such blocks. Then, when the information at a data entry changes, the changed information is written to a new sector on an available block rather than written over the old data; and the old data is marked dirty. After some period, the management processes controlling the block will determine that it is necessary to release space tied up in dirty sectors and select a block to clean up. When cleanup occurs, all of the valid data in the selected block is written to a new block with free space; and then the dirty block is erased and put back into use as a clean block of memory. Because of this involved process, it typically takes as much as two seconds to clean up a block of a flash EEPROM array. However, because erasure need not occur with each entry which is rewritten, erasure may be delayed until a block contains a sufficient amount of dirty information that cleanup is feasible. This reduces the number of erasure operations to a minimum and allows erasure to occur in the background when the facilities for controlling the array are not otherwise occupied with reading and writing.
Each block of the array includes a portion called a block structure storage area which is utilized to store data related to the management of the array and specifically of that block. For example, data related to the number of switching operations which that block has undergone are stored in the block structure storage area. Data relating to read and write errors which occur in the operation of the block are also stored in the block structure storage area. This data is accumulated as the block continues to store different sector data throughout its lifetime of use. However, the memory transistors storing this data are also erased along with the other memory transistors whenever the memory transistors of the block are subjected to the erasure voltage. In order to allow the continued accumulation of data useful to the management of the array, this data must be somehow retained and then rewritten to the block after the erase of the entire block has been completed. It is also possible for a power failure to occur during the period after the erasure of a block has begun and before the erasure has been completed. In such a case, the block may not be completely erased, the data remaining is not trustworthy, the status of the block being erased cannot be determined, and all data stored in random access memory has been lost.
It is desirable to provide a method for reliably storing this block structure data so that it may be replaced on the block during normal operations and in case of power failures occurring during erasure. It is also desirable to know that a power failure during erasure has failed to correctly erase a block.